Quote:
Originally Posted by qball1616
just out of curiosity, are you familiar with the ervius Visual Kitchen?. Like I have said before I am still more or less a noob at cooking ROM's, but not a total noob. So I am not completely understanding what you mean by making the XIP prior to building. To port the XIP, I used XIPPort to dump xip.bin, then made the packages. and put all of the files and modules of MSXIPKernel & MSXIPKerneLTK in \ROM\SHARED\21820\MSXIPKernel, and the kitchen is supposed to do the porting.
so i am not understanding what I need to do to make an XIP. Also what do I use to verify that there are no overlaps and that .VM is defining the allocation space correctly.
any tips would be greatly appreciated.
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Yeah, I am familiar with ervius kitchen. That's why I was saying take the XIP building portion out of the equation by building it yourself. But I guess you can dump the XIP the kitchen made AFTER cooking, get your maps.txt from XIPPort and verify there are no !!!!!!!!!!! anywhere in it as well.
As far as the .VM goes, inside of there is a file called imageinfo.bin. Open that with a Hex Editing program. Bytes 0 - 7 define your slot 0 and slot 1 starting points for reallocation. For example, my imageinfo.bin starts with 00 00 F8 01 00 00 D7 03. This is encoded in little endian (i think). So my Slot 0 allocation should start at 01F80000 and end at 0x0000000 and slot 1 should start at 03D70000 and end at 0x02000000. If any part of your XIP is overlapping into those ranges (again, they will be different for you) then WMreloc will allocate windows module's into that range as well, causing an overlap.
If you open the map.txt generated by XIPPort, you should see portions of both Slot 0 (0x00000000 to 0x01FFFFFF) and Slot 1 (0x02000000 to 0x03FFFFFF) being used by the XIP. These are the first 2 sections of the XIP. Just verify that they are stopping short of these starting points for WMReloc as defined by the imageinfo.bin in the .VM folder.